1. Field of the Invention
The present invention relates to electrical and electronic circuits and systems. More specifically, the present invention relates to sample and hold circuits.
2. Description of the Related Art
Sample and hold (S&H) circuits are well-known in the art. S&H circuits store, on command, the instantaneous amplitude of an input signal. S&H circuits are used in a variety of applications including high-speed Analog to Digital Converters (ADCs). If an ADC was perfect, then all errors associated with the conversion might be presumed to be caused by the S&H. In reality, often the S&H performance is the limiting factor with respect to the overall ADC system performance. Therefore, it is important to optimize the S&H performance with respect to speed, accuracy, linearity and lack of distortion.
There are several shortcomings associated with conventional S&H circuits. First, switching transients tend to degrade the performance of conventional S&H circuits. Second, the need to limit input voltage swings to avoid overdriving internal circuits tends to limit the dynamic range of the circuit. Third, undesirable variations in gain, as a function of input voltage may cause, a nonlinearity over the input voltage range. Fourth, variations in input voltage may cause other distortions and limit the dynamic range of the S&H.
Hence, a need exists in the art for an improved sample and hold circuit for analog-to-digital converters and other applications.